2nd Aurora Forum
Next Generation Vector Supercomputer
2nd Aurora Forum
NEC again open up the doors to a new Aurora Forum meeting to inform interested developers and users about the SX-Aurora TSUBASA at the ISC HPC Conference in Frankfurt.
The NEC SX-Aurora TSUBASA is the newest in the line of NEC SX Vector Processors with the worlds highest memory bandwidth. The Processor that is implemented in a PCI-e formfactor can be configured
in many flexible configurations together with a standard x86 cluster. No special framework is needed to build the applications, but standard programming paradigms in C/C++ and Fortran, for which the NEC compiler will automatically carry out vectorization and parallelization.
The target is a higher sustained performance with minimum effort by utilizing the Vector Engine hardware.
Event Details
Date:
June 25, 2018 (Monday) 10:00 ~ 12:00. (Registration from 9:45)
Location:
GRANDHOTEL HESSISCHER HOF
Friedrich-Ebert-Anlage 40
60325 Frankfurt am Main
Tel.: +49 (0)69 / 75 40 – 2947
Fax: +49 (0)69 / 75 40 – 2925
Host:
NEC Corporation
At this event NEC will present experiences and information about the NEC SX-Aurora TSUBASA.
6/25 (Mon) | @GRANDHOTEL HESSISCHER HOF |
9:45-10:00 | Registration |
10:00-10:05 | Welcome |
10:05-10:10 | SX-Aurora TSUBASA Introduction (NEC) |
10:10-10:30 | Early Experiences with SX-Aurora TSUBASA (Tohoku University: Prof. Hiroaki Kobayashi) |
10:30-10:50 | Machine Learning Middleware for SX-Aurora TSUBASA (NEC Corporation: Dr. Takeo Hosomi) |
10:50-10:55 | Break |
10:55-11:15 | VEO: Vector Engine Offloading (NEC Deutschland GmbH: Dr. Erich Focht) |
11:15-11:35 | OpenMP Offload Programming Model for Aurora (RWTH Aachen University: Dr. Tim Cramer) |
11:35-11:55 | Deep Learning with Vector Processor (NEC Laboratories America: Dr. Hans Peter Graf) |
11:55-12:00 | Closing |